Publications: Patents

37. R. Bashir, A. Alam, D. Akin, O. E. Elibol, J. B. Reddy, D. E. Bergstrom, Y. S. Liu, US Patent # 8,945,912, February 3rd, 2015.“DNA Sequencing and Amplification Systems Using Nanoscale Field Effect Arrays”.

36. M. Toner, R. Bashir, X. Cheng, U. Demirci, D. Irimia, W. R. Rodriguez, L. Yang, L. Zamir, Y. Liu, US Patent# 8,852,875, October 7, 2014, “Methods for Counting Cells,”.

35. M. Maschmann, T. S. Fisher, T. Sands, R. Bashir, U.S. Patent #8,679,630, granted March 25, 2014, “Vertical Carbon Nanotube Device In Nanopore Templates.”.

34. R. Bashir, L. R. Razouk, D. T. Morisette, B. Erimli, U.S Patent # 7,816,100, Oct 19th, 2010, “Apparatus and Method for Detecting Live Cells With an Integrated Filter and Growth Detection Device”.

33. R. Bashir, L. R. Razouk, D. T. Morisette, B. Erimli, U.S. Patent #7,553,633, June 30, 2009, "Apparatus and Method for Detecting Live Cells with an Integrated Filter and Growth Detection Device".

32. R. Bashir, R. Gomez, US Patent # 7,435,579, Oct 14th, 2008, "Biosensor and Related Method".

31. R. Bashir, L. Razouk, D. M. Morisette, B. Erimli, US Patent # 7,413,891, August 19th, 2008. "Apparatus and Method for Detecting Live Cells with an Integrated Filter and Growth Detection Device".

30. R. Gomez, R. Bashir; A. K. Bhunia, M. Ladisch, J. P. Robinson, US Patent # 7,306,924, Dec 11th, 2007. "Biosensor and Related Method".

29. R. Bashir, N. Peppas, Z. Hilt, A. Gupta, US Patent # 6,935,165, Aug 30th, 2005. "Microscale sensor element and related device and method of manufacture.

28. R. Bashir, R. Gomez, M. Ladisch, A. Bhunia, J. P. Robinson, US Patent # 6,716, 620, April 6th, 2004, "Biosensor and Related Method".

27. J. M. McGregor, Rashid Bashir, Wipawan Yindeepol, U. S. Patent #6,362,064, March 26th , 2002, "Elimination of walkout in high voltage trench isolated devices".

26. A. E. Kabir, R. Bashir, U. S. Patent #6,346,452, February 12th, 2002, "Method for controlling an N-type dopant concentration depth profile in bipolar transistor epitaxial layers".

25. R. Bashir, W. Yindeepol, U. S. Patent #6,121,148, Granted September 19th, 2000, "Semiconductor device trench isolation structure with polysilicon bias voltage contact".

24. P. Moore, R. Bashir, U.S. Patent #6051466 granted April 18th, 2000, "Thin Liquid Crystal Transducer Pixel Cell Having Self-Aligned Support Pillers".

23. R. Bashr, A. E. Kabir, U. S. Patent #6,012,335, Granted Jan 11th, 2000, "High sensitivity micro-machined pressure sensors and acoustic transducers".

22. R. Bashir, U.S. Patent #5952706 granted Sept 14th, 1999, "Semiconductor Integrated Circuit Having a Lateral Bipolar Transistor Compatible with Deep Sub-Micron CMOS Processing".

21. R. Bashir; F. Hebert, U. S. Patent #5930635 granted July 27th, 1999, "Complementary Si/SiGe Heterojunction Bipolar Technology".

20. R. Bashir, W. Yindepool, U. S. Patent #5914523 granted June 22nd, 1999, "Semiconductor device trench isolation structure with polysilicon bias voltage contact"

19. R. Bashir, A. E. Kabir, U. S. Patent #5888845 granted March 30th, 1999, "Method of Making High Sensitivity Micro-machined Pressure Sensor and Acoustic Transducer".

18. R. Bashir, A. E. Kabir, F. Hebert, U. S. Patent # 5856239, granted Jan 5th, 1999, "Tungsten silicide/ tungsten polycide anisotropic dry etch process".

17. R. Bashir, F. Hebert, D. Chen, U. S. # 5827762 granted Oct 27th, 1998, "Method for forming buried interconnect structue having stability at high temperatures".

16. W. Yindepool, J. McGregor, K. Brown, R. Bashir, U. S. Patent # 5,811,315 granted September 22nd, 1998, "Method of Forming and Planarizing Deep Isolation Trenches in a Silicon-on-insulator (SOI) Structure".

15. F. Hebert, R. Bashir, U. S. Patent #5,773,350 granted June 30th, 1998, "Method of forming a Self Aligned BJT with Silicide Extrinsic Base Contacts and Selective Epitaxial Grown Intrinsic Base".

14. R. Bashir, U. S. Patent #5,780,343 granted June 15th, 1998, "A Simple Process to Produce High Quality Silicon Surface Prior to Selective Epitaxial Growth".

13. R. Bashir, A. E. Kabir, U. S. Patent #5,747,353 granted May 5th, 1998, "Method of making Surface Micro-machined Accelerometers using Silicon on Insulator Technology".

12. F. Hebert, R. Bashir, D. Chen, U. S. Patent #5,691,232 granted Nov. 25th, 1997, "Planarized Trench and Field Oxide Isolation Scheme".

11. F. Hebert, R. Bashir, D. Chen, U. S. Patent #5,683,932 granted Nov. 4th, 1997, "Planarized Trench and Field Oxide Isolation Scheme".

10. F. Hebert, R. Bashir, D. Chen, U. S. Patent # 5,681,776 granted Oct. 28th, 1997, "Planar Selective Field Oxide Isolation Process and Structrues".

9. R. Bashir, F. Hebert, U. S. Patent # 5,581,114 granted Dec. 3rd, 1996, "Self-Aligned Polysilicon Base Contact in a Bipolar Junction Transistor".

8. F. Hebert, D. Chen, R. Bashir, U. S. Patent # 5,439,833 granted Aug. 8th, 1995, "Method of making Truely Complementary and Self-Aligned Bipolar and CMOS Transistors with Minimized Base and Gate Resistances and Parasitic Capacitances".

7. R. Bashir, F. Hebert , U. S. Patent # 5,451,532 granted Sept 19th, 1995, "Process for Making Self-Aligned Base Polysilicon or Polysilicide Contacts in Bipolar Transistors".

6. R. Bashir, F. Hebert, D. Chen, U. S. Patent # 5,411,913, granted May 2nd, 1995, "Simple Planarized Trench Field Oxide and Poly Isolation Scheme".

5. R. Bashir, F. Hebert, U. S. Patent # 5,397,722 granted March 14th, 1995, "Process for Making Self-Aligned Source/Drain Polysilicon or Polysilicide Contacts in Field Effect Transistors".

4. R. Bashir, F. Hebert, D. Chen, U. S. Patent # 5,385,861 granted Jan. 31st, 1995 "Planarized Trench and Field Oxide and Poly Isolation Scheme-Method".

3. G. W. Neudeck, R. Bashir, U. S. Patent # 5,434,092 granted July 18th, 1995, "Method for fabricating a triple self-aligned bipolar junction transistor ".

2. G. W. Neudeck, R. Bashir, U. S. Patent # 5,382,828 granted Jan. 17th, 1995, "Triple Self-Aligned Bipolar Junction Transistor-Method".

1. G. W. Neudeck, R. Bashir, U. S. Patent # 5,286,996 granted Feb. 15th, 1994, "Triple Self-Aligned Bipolar Junction Transistor-Structure".